Proximity detectors for detecting ferrous or magnetic articles are known. One application for such devices is in detecting the approach and retreat of each tooth of a rotating ferrous gear. The magnetic field associated with the ferrous article is detected by a magnetic field-to-voltage transducer, such as a Hall element or a magnetoresistive device, which provides a signal proportional to a detected magnetic field (i.e., a magnetic field signal). The proximity detector processes the magnetic field signal to generate an output signal that changes state each time the magnetic field signal crosses a threshold signal.
In one type of proximity detector, sometimes referred to as a peak-to-peak percentage detector, the threshold signal is equal to a percentage of the peak-to-peak magnetic field signal. One such peak-to-peak percentage detector is described in U.S. Pat. No. 5,917,320 entitled DETECTION OF PASSING MAGNETIC ARTICLES WHILE PERIODICALLY ADAPTING DETECTION THRESHOLD and assigned to the assignee of the present invention.
Another type of proximity detector, sometimes referred to as a slope-activated or a peak-referenced detector is described in U.S. Pat. No. 6,091,239 entitled DETECTION OF PASSING MAGNETIC ARTICLES WITH A PEAK REFERENCED THRESHOLD DETECTOR, which is assigned to the assignee of the present invention. Another such peak-referenced proximity detector is described in U.S. patent application entitled PROXIMITY DETECTOR, filed on May 28, 2002, and assigned application Ser. No. 10/156,684, which is assigned to the assignee of the present invention and incorporated herein by reference. In the peak-referenced proximity detector, the threshold signal differs from the positive and negative peaks (i.e., the peaks and valleys) of the magnetic field signal by a predetermined amount. Thus, in this type of proximity detector, the output signal changes state when the magnetic field signal comes away from a peak or valley by the predetermined amount.
In order to accurately detect the proximity of a ferrous article, the proximity detector must be capable of closely tracking the magnetic field signal. Typically, one or more digital-to-analog converters (DACs) are used to generate a signal which tracks the magnetic field signal. For example, in the above-referenced U.S. Pat. Nos. 5,917,320 and 6,091,239, two DACs are used; one to track the positive peaks of the magnetic field signal (PDAC) and the other to track the negative peaks of the magnetic field signal (NDAC).
Referring to FIG. 1, a peak-referenced proximity detector 10 is shown which uses a single DAC 28 to track a magnetic field signal, DIFF. A Hall element 14 generates a differential signal proportional to an ambient magnetic field, which signal is amplified by an amplifier 16 to provide the DIFF signal. The DIFF signal is coupled to a non-inverting input of a tracking comparator 20 which also receives, at an inverting input, the output signal, PEAKDAC, of the DAC 28. The DIFF signal is further coupled to a non-inverting input of a comparator 40 which also receives, at an inverting input, the PEAKDAC signal, and which generates a POSCOMP output signal. The comparator 40 has hysteresis, here on the order of 100 mV, so that the POSCOMP signal changes state when the DIFF signal exceeds the PEAKDAC signal by approximately 100 mV. The COMPOUT output signal of the comparator 20 is coupled to an exclusive OR (XOR) gate 36, which additionally receives the POSCOMP signal, and which provides a HOLD input signal to an up/down counter 24. The counter 24 is further responsive to a clock signal, CLK, and to the POSCOMP signal for controlling whether the counter 24 counts up or down. The output of the counter 24 is converted into the PEAKDAC tracking signal by the DAC 28.
As is illustrated in FIG. 2, whenever the DIFF signal exceeds the PEAKDAC signal by the hysteresis level of the comparator 20, such as by 10 mV, the COMPOUT signal transitions to a logic high level, thereby causing the counter 24 to count if the POSCOMP signal is also high. Once the counter 24 counts up one step, the COMPOUT signal goes low causing the count value to be held until the DIFF signal exceeds the PEAKDAC signal by 10 mV again. When the DIFF signal reaches a positive peak, as occurs at time t1, the PEAKDAC signal stays above the DIFF signal, thereby causing the HOLD input to the counter 24 to be asserted until the hysteresis of the comparator 40 has been overcome, as occurs when the POSCOMP signal goes low, just before time t2.
When the DIFF signal changes more rapidly as occurs beginning at time t3, the PEAKDAC signal is not able to keep up with the fast changing DIFF signal. More particularly, the DAC 28 counts at its maximum rate (i.e., the PEAKDAC signal experiences its maximum slope, dV/dt) after the POSCOMP signal transitions, such as at times t0, t2, t3, t4, and t6. Between times t4 and t5, the DIFF signal has a slope greater than the maximum dV/dt of the DAC and the PEAKDAC signal does not catch up with the falling DIFF signal until time t5 when the DIFF signal is rising. In this case, the DIFF signal valley occurring between times t4 and t5 is not detected, thereby causing a transition of the POSCOMP signal to be delayed. It will be appreciated that an even faster changing DIFF signal can result in a transition of the POSCOMP signal being skipped and a passing magnetic article to go undetected. It will also be appreciated that the same potential problem of skipping POSCOMP signal transitions can occur when the DIFF signal has a rapidly decreasing or rapidly increasing amplitude, since the PEAKDAC signal will not have time to catch the DIFF signal before it changes direction.
Also, it should be recognized that the DAC 28 (FIG. 1) converts from a digital to an analog signal in a conversion time, which may be a significant amount of time relative to a clock period applied by the counter 24 (FIG. 1) to the DAC 28. Therefore, it should be recognized that the conversion time of the DAC 28 can also limit the ability of the PEAKDAC signal to keep up with a rapidly changing DIFF signal when the DAC 28 cannot convert in a clock period. Furthermore, it is generally known that DACs with more bits require greater conversion times. Therefore, in order for the PEAKDAC signal to keep up with a rapidly changing DIFF signal, the number of DAC bits can be limited, for example, to eight bits. However, having only eight bits, the conventional proximity detector of FIG. 1 can experience undesirable jitter of the PEAKDAC signal edges, and therefore, undesirable jitter of the POSCOMP signal edges, resulting in reduced accuracy of the proximity detector.
It would, therefore, be desirable to overcome the aforesaid and other disadvantages, and to provide a proximity detector able to accurately detect a ferrous article moving at a high rate and to reduce signal edge jitter.